50 recent changes in Timing Web retrieved at 04:21 (GMT)

TimingSystemHowWrMil
How To: White Rabbit to MIL Gateway Introduction This is How To about the White Rabbit to MIL Gateway, wr mil. The how to of the 50 Hz synchronization of UNILAC ...
TimingSystemHowTo
HOW TOs This is just a unrevised collection. The purpose is to write down some things, before we forget them... Timing System The recommended official interface ...
TimingSystemUniChop
UNILAC Chopper Firmware and Monitoring Introduction The main documentation about the (new) UNILAC chopper can be found here. This wiki page only describes som...
TimingSystem50HzSync
WR F50: Synchronizing the White Rabbit Data Master to 50 Hz Mains Introduction Stability of Linac RF systems are vital for a stable operation of UNILAC. As many ...
TimingSystemDocuments
Documents Table of Contents Technical Documents General Machine Timing System * Timing System @ GSI * Master (10/2019) * Network (04/2015) ...
TimingSystemWrMil
WR MIL Gateway Introduction The White Rabbit to MIL gateway can work in one GID only. Its main features are. * listen to so called legacy event numbers, EvtNo...
TimingSystemGmtUnipz
Data Master, UNILAC PZ and Various Gateways An Overview Introduction Today (December 2021) there exist two Machine Timing Systems at GSI. First, the General Ma...
TimingSystemOlderNews
Older News * 21 September 2021 * uhps, the Grandmaster had the wrong time * fixed * 15 September 2021 * electricity is back again * ...
TimingSystemHowCodeDeployWRUniPZ
How To: White Rabbit UNILAC PZ (wr unipz) Coding and Deployment Introduction Stack of the White Rabbit Pulszentrale Figure: Overview on the White Rabbit Pul...
TimingSystemHowUniChop
How To: UNILAC Chopper Firmware and Monitoring Introduction The main documentation about the (new) UNILAC chopper can be found here. This how to describes th...
TimingSystemHowConfigureDMUniPZ
How To: Gateway Data Master UNILAC Pulszentrale Konfiguration und Rufbereitschaft Hinweis Ein How To zur Diagnose der UNILAC Pulszentrale gibt es hier. Hintergr...
TimingSystemDMUniPZ
Gateway Data Master UNILAC PZ (dm unipz) Introduction dm unipz 'dm unipz' is the interface between the White Rabbit based Data Master und the MIL based UNILAC ...
WebHome
General Machine Timing System at GSI and FAIR The FAIR facility involves a long chain of accelerators which need to be tightly synchronized. This is achieved by t...
TimingSystemEvent
Timing Messages Format of a Timing Message Timing messages is a term describing the input to a Timing Receiver (TR) that possibly leads to generation of a so cal...
TimingSystemEventMil
MIL Event Telegram Format Introduction The 'old' GSI control system used a field bus that is an extension of the MIL STD 1553 field bus 1 . At GSI, this 'MIL bu...
TimingSystemGroupsAndMachines
Groups and Machines Figure: Overview on GSI accelerators. Click here for a larger image. Overview Accelerator equipment relevant for the control system is organi...
TimingSystemEventNumbers
Event Numbers Overview Event numbers serve as IDs for actions performed by the control system. Existing Facility Information about event numbers used by the ex...
TimingSystemHowGenerateBursts
Main.EnkhboldOchirsuren 17 Oct 2024 How To: Burst generation this functionality is under development and not available in any release A simple solution for gener...
TimingSystemAcronyms
Acronyms These acronyms are focused on the timing system, but may contain other acronyms of the accelerator complex as well. Unclear Acronyms acronyms to be clar...
r11 - 14 Oct 2024 - 11:13 by AnnaRanz
TimingSystemContext
The Timing System and its Context in the Accelerator Control System What is described here has been compiled from the Common Specifications for the Accelerator Co...
r18 - 14 Oct 2024 - 07:35 by AnnaRanz
TimingSystemOverview
Introduction to the General Machine Timing System The FAIR facility involves a long chain of accelerators which need to be tightly synchronized. An important cons...
r15 - 14 Oct 2024 - 07:33 by AnnaRanz
Members
GSI Timing Team Core members of the GSI Timing Team are: F. Ameil: team leader D. Beck: operation, tools and docs, legacy stuff for UNILAC, bunch 2 bucket transfe...
TimingSystemDataMaster
Data Master Manuals DM Technote: DM Manual. A DM Firmware and API Documentation. WIP, about 80% complete. Still trying to keep up with all the implemented feature...
TimingSystemDataMasterTestSystem
Documentation Data Master Test System Hardware SuperMicro fel0069 The data master for the test system is hosted on SuperMicro fel0069 with two PEXARIA5d (fel006...
TimingSystemDataMasterTestsHowTo
How to run and develop tests for the Datamaster General Framework The tests for the datamaster are designed for use during development of datamaster features and...
TimingSystemDocumentsSaftlib
Simple API For Timing (SaftLib) Simple API For Timing (SAFT). The design and implementation of SaftLib is a major project. Introduction The key features SaftLib ...
r36 - 26 Sep 2024 - 12:50 by TobiasHabermann
TimingSystemHowBuildingDeployment
How To: Building and Deployment for Linux Boxes and SCU Most of the code has been developed in the context of the White Rabbit Project and is hosted by the Open H...
TimingSystemFRelease
Fallout Release Previous releases are Asterisk, Balloon, Cherry, Doomsday and Enigma New features and bug fixes in Fallout Release * 2020 Aug 31: v6.0.0 alph...
TimingSystemHowPhtif
How To: Poor Humans TIF An Ugly Temporary TIF Workaround for the 2021, 2022, 2023 and 2024 Beam Times Introduction As there is currently no replacement for the...
TimingSystemHowBasicsDMUniPZ
Einleitung Das Gateway hat die Aufgabe, das zeitbasierte White Rabbit Timingsystem mit der eventbasierten UNILAC Pulszentrale (UNIPZ) zu verbinden. Bei UNIPZ wurd...
TimingSystemDocumentsReportsAndMeasurements
Reports and Measurements This page serves to collect reports and measurements on the GMT. Booster Test * Timing events during 1st Booster Mode Test (2021 12 1...
TimingSystemIrradtionHHD
Irradiation of Fibres at HHD Cave (SIS18 beam dump) Introduction For FAIR, timing sensitive equipment will be installed in the niches of SIS100. It might be poss...
TimingSystemIrradtionSIS18
Irradiation of Fibres at SIS18 Introduction For FAIR, timing sensitive equipment will be installed in the niches of SIS100. It might be possible, that fibres to ...
TimingSystemDocumentsNetwork
Timing Network Networks There are several instances of timing networks on the campus. * Productive * production: everything starting with the end of TK ...
TimingSystemDocumentsConnectionEELabor
Connection to EE Labor This is just a temporary document, to be replaced by some proper documentation. Note on calculating cable lengths The cable length has bee...
TimingSystemDataMasterUnilac
Description of the features for the UNILAC Datamaster This describes the planned features for the UNILAC datamaster. The features were presented at the Workshop U...
TimingSystemHowWebMonitoring
How To: Monitoring via Web Pages Introduction This How To describes how to do monitoring via web pages. Access Some web pages are only accessible on the GSI cam...
TimingSystemHowFECCheck
How To: Check a FEC Introduction This How To describes how to check a FEC works properly with respect to features provided by the GMT. Test Plan This is just a ...
TimingSystemHowSaftUni
How To: saft uni Introduction This tool is intended to diagnose UNILAC operation. This tool is experimental! The standard tool saft ctl can of course be used. Ho...
TimingSystemPCIeSimpleDriver
Main.MichaelReese 14 Aug 2023 Device Driver Tutorial EB slave WB master over PCIe The goal is to write an Etherbone slave that controls a wishbone master on the ...
r2 - 14 Aug 2023 - 14:23 by MichaelReese
TimingSystemPCIeDirectAccessMode
Main.MichaelReese 15 Feb 2018 PCIe WB bridge direct access mode PCIe timing hardware where the PCIe bridge has been modified to support the "direct access mode" ...
r9 - 12 Jun 2023 - 07:28 by MichaelReese
TimingSystemXdot
HOW TO: Use xdot to analyze schedules Based on Graphviz dot language there is the tool xdot. A GSI fork of xdot (one of 136 forks) enhances this to analyze schedu...
TimingSystemHowWRUniPZ
"wr unipz" is a component of the MIL based UNILAC 'Pulszentrale' (UNIPZ). As a field bus, it does not use the MIL 'Event' bus but a White Rabbit network. Logicall...
RunOrdinaryBoundaryClocksUsingLinuxptp
Run the ordinary and boundary clocks using linuxptp The linuxptp package is a PTPv2 implementation according to the IEEE 1588 standard for Linux. It includes the ...
TimingSystemHowEbReset
How To: eb rest Introduction This tool has been written to easy 'reset of FPGA'. This cycles the FPGA and (re)loads the image from the flash to the FPGA. Use too...
TestIeee1588NetworkAdapters
Test the interoperability of the IEEE 1588 capable network adapters with the White Rabbit switches Introduction This report presents the interoperability between...
GHDLVHPI
GHDL coupling to C via VHPI Motivation It is often useful to call into c libraries from within a VHDL simulation/testbench * because VHDL standard library is ...
r2 - 20 Oct 2022 - 09:04 by MichaelReese
TimingSystemEtherbone
Etherbone Introduction The idea behind the EtherBone (EB) protocol is to extend the reach of the embedded Wishbone (WB) V4 System on a chip (SoC) bus system to r...
TimingSystemHowInstallEtherboneOnTSL101
Install etherbone library on tsl101 server * login on acc8 dev cluster (e.g. asl751) and clone repo and checkout correct branch git clone https://github.com/GS...
NEW - 07 Sep 2022 - 09:07 by MichaelReese
SynchronizeNonWrDevices
Synchronize the clock of non WR devices in the WR network 1. Introduction This document presents specific configurations of White Rabbit (WR) switches, which are...
Number of topics: 50
Page 1 of 5 Next >

See also: rss-small RSS feed, recent changes with 50, 100, 200, 500, 1000 topics, all changes
Topic revision: r1 - 09 Jan 2009, ProjectContributor
This site is powered by FoswikiCopyright © by the contributing authors. All material on this collaboration platform is the property of the contributing authors.
Ideas, requests, problems regarding Foswiki? Send feedback