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TimingSystemHowSoftCPUAccessOtherWB
How To: LM32 Soft CPU Accessing Another SoC Wishbone Device Introduction This how to demonstrates how to access another Wishbone device on the same SoC from th...
TimingSystemHowSoftCPUCompiler
How To: LM32 Soft CPU Compiler Introduction This how to describes the status and how to build the compiler for the lm32 soft cpu. Links * on github (for be...
TimingSystemHowSoftCPUHandleECAMSIs
How To: LM32 Soft CPU Handle the ECA message signaled interrupts (MSIs) Introduction The ECA unit is capable to send MSI on certain conditions, such as: * p...
TimingSystemHowSoftCPULM32Command
How To: LM32 Soft CPU Send a Command to a LM32 Soft CPU Introduction This how to demonstrates how to send a command to LM32 Soft CPU. This how to demonstrates ...
TimingSystemHowSoftCPUStackCheck
How To: LM32 Soft CPU Simple Stack Check Introduction This how to demonstrates how a simple check for possible stack violation has been implemented. Principle...
TimingSystemHowSoftCPUUseDevicebus
How To: LM32 Soft CPU Using MIL Devicebus Introduction This how to demonstrates how to access a device on a MIL Devicebus connected to the SCU ("MIL piggy"). A...
TimingSystemHowTRInstallation
How To: Installation of a Timing Receiver or SCU THIS HOWTO IS DEPRECATED This how to summarizes the steps required to install a timing receiver. Setup up a FE...
TimingSystemHowTRRegistration
How To: Connecting a Timing Receiver to the White Rabbit Network A timing receiver MUST NOT be connected to a White Rabbit network without authorization. Authori...
TimingSystemHowTo
HOW TOs This is just a unrevised collection. The purpose is to write down some things, before we forget them... Timing System The recommended official interface ...
TimingSystemHowToHelloWorldSoftCPU
Hello World on lm32 Soft CPU THIS HOWTO IS DEPRECATED A soft CPU based on the lm32 is embedded in the White Rabbit core. This how to describes a "Hello World" f...
TimingSystemHowToInstallSoftCPUforPEXARIA2A
Installation of Tool Chain for the lm32 Soft CPU THIS HOWTO IS DEPRECATED A soft CPU based on the lm32 is embedded in the White Rabbit core. This how to describ...
TimingSystemHowToInstallSoftCPUforSPECV2
Tool Chain for a SPEC Board. THIS HOWTO IS DEPRECATED A soft CPU based on the lm32 is embedded in the White Rabbit core. This how to describes the installation ...
TimingSystemHowToMiniCS
Timing System within miniCS THIS HOWTO IS DEPRECATED After reflashing and upgrading the SCUs to 64bit, the timing system of release R1 is no longer operational!...
TimingSystemHowToVersand
Sending Stuff from GSI Elsewhere THIS HOWTO IS DEPRECATED Requirements * ebiss Account @ GSI, see here * Account number ("Kostenstelle" or "Auftragsnumme...
TimingSystemHowTriggerLM32FromEca
Timing Messages: How To test the ECA queue from LM32 Soft CPU and PC Introduction The specified ECA queue is used to storage timing events filtered by eventID. T...
TimingSystemHowWRUniPZ
"wr unipz" is a component of the MIL based UNILAC 'Pulszentrale' (UNIPZ). As a field bus, it does not use the MIL 'Event' bus but a White Rabbit network. Logicall...
TimingSystemHowWebMonitoring
How To: Monitoring via Web Pages Introduction This How To describes how to do monitoring via web pages. Access Some web pages are only accessible on the GSI cam...
TimingSystemHowtoRTE
How to Build and Deploy the Timing Run Time Environment THIS HOWTO IS DEPRECATED The documentation here describes a version of the script that has never been pu...
TimingSystemHowtoRTEManual
Building and Deployment for a Specific Kernel and Installation into a Staging Directory THIS HOWTO IS DEPRECATED Remark: This is really special. The information...
TimingSystemIrradtionHHD
Irradiation of Fibres at HHD Cave (SIS18 beam dump) Introduction For FAIR, timing sensitive equipment will be installed in the niches of SIS100. It might be poss...
TimingSystemIrradtionSIS18
Irradiation of Fibres at SIS18 Introduction For FAIR, timing sensitive equipment will be installed in the niches of SIS100. It might be possible, that fibres to ...
TimingSystemLSAInterface
FESA Properties for DataMaster Class (current version running on vmla03) Global Interface (Device Name MCS_DM_GLOBAL) Setting Properties * Command * dataM...
r10 - 22 Oct 2014 - 09:37 by MathiasKreider
TimingSystemMacAuthentication
White Rabbit Switch 802.1X MAC Authentication Introduction This is a standard feature of 'normal' network switches from Cisco, HP, ... and involves a remote Radi...
TimingSystemManagementMaster
Management Master Configuration ... to be done... Main.DietrichBeck 03 Apr 2014
TimingSystemNetworkBasics
(Some) Basics of Networking and White Rabbit The prime source for information for White Rabbit project is the Open Hardware Repository. The aim of this page is to...
TimingSystemNextReleaseCandidate
"D?" Candidate Release Probably in March 2018. See here. Main.DietrichBeck 01 Mar 2018
TimingSystemNodesCurrentRelease
This pages just includes the page of the current release. For editing that page, go here.
TimingSystemNodesReleaseAsterisk
Release Asterisk v2 (for miniCS) and updates compatible with SaftLib ( OUTDATED ) Asterisk is compatible to the control system releases R3, R4, R5 and R6 The rele...
TimingSystemNodesReleaseAsteriskExploder5aCommission
Exploder5a Commissioning Guide Note: This test is functional. It is not intended to cover verification validation tests of the design! Note: Software/Version ...
TimingSystemNodesReleaseAsteriskPexaria5Commission
Step by step guide to commissioning a new pexaria5: 1 Place powered off pexaria5 on ESD desk , ESD dischare! 1 Attach wrex2a addon board to baseboard WR1 (W...
TimingSystemNodesReleaseAsteriskVetar2aCommission
Vetar2a Commissioning Guide Note: This test is functional. It is not intended to cover verification validation tests of the design! Needed components for each...
TimingSystemNodesReleaseR1
Nodes: Release R1 Overview rpd ...
TimingSystemNodesReleaseR1Exploder2C
EXPLODER2C (Release R1) The EXPLODER2C is a carrier board for a stand alone device based on an ArriaII FGPA. It can be White Rabbit enabled using the WREX1 add on...
TimingSystemNodesReleaseR1PEXARIA5
PEXARIA5 (Release R1) The PEXIARA5A is a PCIe carrier board based on an ArriaV FPGA. It can be White Rabbit enabled using a WREX1 add on board. I/O are implemente...
TimingSystemNodesReleaseR1SCU2
SCU2 (Release R1) The SCU (Scalable Control Unit) is the standard front end controller used by the CSCO group based on an ArriaII FPGA. It can be White Rabbit ena...
TimingSystemNodesReleaseR1VETAR2
VETAR2 (Release R1) The VETAR2 is a VME carrier board that can be White Rabbit enabled using the VETAR1DB2 add on board. I/Os are defined by a mezzanine board. H...
TimingSystemNodesSnapshotApr2017
Snapshot April 2017 DON'T USE THIS SNAPSHOT!!! IT WAS DECIDED TO CANCEL THE ROLL OUT. This snapshot became necessary due to updates of the so called "function...
TimingSystemNodesSnapshotJan2016
Snapshot "January 2016" The intention of this snapshot is twofold. First, to make improvement of White Rabbit available at GSI. Second, to provide again a consist...
TimingSystemOlderNews
Older News * 21 September 2021 * uhps, the Grandmaster had the wrong time * fixed * 15 September 2021 * electricity is back again * ...
TimingSystemOverview
Introduction to the General Machine Timing System The FAIR facility involves a long chain of accelerators which need to be tightly synchronized. An important cons...
TimingSystemPCIeDirectAccessMode
Main.MichaelReese 15 Feb 2018 PCIe WB bridge direct access mode PCIe timing hardware where the PCIe bridge has been modified to support the "direct access mode" ...
r9 - 12 Jun 2023 - 07:28 by MichaelReese
TimingSystemPCIeSimpleDriver
Main.MichaelReese 14 Aug 2023 Device Driver Tutorial EB slave WB master over PCIe The goal is to write an Etherbone slave that controls a wishbone master on the ...
r2 - 14 Aug 2023 - 14:23 by MichaelReese
TimingSystemPEXPTestingAndCommissioning
PEXP Testing and Commissioning Guide Attention: This guide does not check the whole PCIe standard! Attention: This is NOT for FAT Required component...
TimingSystemPMCTestingAndCommissioning
PMC Testing and Commissioning Guide Attention: This guide does not check the whole PCI/PMC standard! Attention: This is NOT for FAT Required comp...
TimingSystemPexaria5TestingAndCommissioning
Testing and Commissioning Guide for Pexaria5 Required components * Pexaria5 under test (named as P5UT in this guide) * PC with Intel Quartus (version 18...
TimingSystemPolicies
Policies in the Timing Network * The timing network is managed by TOS and TOS defines the policies. * The timing network is a "field bus" synchronizing the...
TimingSystemRadiusVlan
Authentication of network nodes and assginment of virtual LAN using the White Rabbit switches 1. Introduction The 802.1x authentication standard is supported by ...
TimingSystemRelease
Releases and Snapshots of the Timing System Release A Timing Firmware Release packs together new features and requirements defined in our Development Road Map, ...
TimingSystemSwitchHowToDIM
WR Switch: How To Cross Compile DIM THIS HOWTO IS DEPRECATED This describes the first try to cross compile DIM for a White Rabbit switch. DIM is a communication...
TimingSystemSwitchHowToFlash
WR Switch: How To Flash a WR Switch THIS HOWTO IS DEPRECATED Introduction Most importantly, you should the WRS manual. For version 4.2, see here. Basically, al...
Number of topics: 50
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   <li>%INCLUDE{"%TOPIC%" section="searchbyletterlink" letter="V"}%</li>
   <li>%INCLUDE{"%TOPIC%" section="searchbyletterlink" letter="W"}%</li>
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   <li>%INCLUDE{"%TOPIC%" section="searchbyletterlink" letter="Y"}%</li>
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</ul>
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Topic revision: r1 - 09 Jan 2009, ProjectContributor
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