Children of TimingSystemDocuments in Timing Web
Results from Timing web retrieved at 23:29 (GMT)
TimingSystemDMUniPZ
Gateway Data Master UNILAC PZ (dm unipz) Introduction "dm unipz" is the interface between the White Rabbit based Data Master und the MIL based UNILAC 'Pulszentr...
r10 - 31 Jan 2022 - 19:34 by DietrichBeck
TimingSystemDeprecatedDocumentation
Deprecated Documents This is just a unrevised collection of outdated or deprecated documents. * Feature List for a Timing Receiver Node at GSI/FAIR (09/2014)...
NEW - 20 Nov 2018 - 07:27 by DietrichBeck
TimingSystemDocumentsAddOnBoardFeatures
Feature List for Add On boards of Timing Receivers at GSI and FAIR This page lists some hardware features for add on boards. Such add on boards are mezzanine boar...
r11 - 01 Nov 2013 - 08:15 by DietrichBeck
TimingSystemDocumentsFTRNFeatures
Feature List for Timing Receivers at GSI and FAIR This page lists some hardware features for timing receivers at GSI and FAIR. Some recommended features will beco...
r13 - 25 Sep 2014 - 20:07 by DietrichBeck
TimingSystemDocumentsGateFirmWare
Gateware and Firmware Gateware and firmware are provided with releases. * Gateware: synthesized (V)HDL code * Firmware: compiled code for the lm32 soft CPU ...
r8 - 30 Sep 2020 - 09:59 by DietrichBeck
TimingSystemDocumentsMaster
The FAIR Timing Master in the "Betriebsgebäude" BG This is a collection of documents related to the FAIR Timing Master in the "Elektronikraum". Equipment Rack5...
r10 - 29 Oct 2019 - 12:44 by DietrichBeck
TimingSystemDocumentsNetwork
Timing Network Networks There are several instances of timing networks on the campus. * Productive * production: everything starting with the end of TK ...
r3 - 22 Apr 2024 - 05:42 by DietrichBeck
TimingSystemDocumentsPEXARIA5DB1
PEXARIA5DB The PEXIARA5DB is a mezzanine card for a PEXARIA5 carrier board. It exists in two variants. * PEXARIA5DB1, with IDC connector for LVDS signals: sche...
r4 - 05 May 2014 - 07:33 by DietrichBeck
TimingSystemDocumentsReportsAndMeasurements
Reports and Measurements This page serves to collect reports and measurements on the GMT. Booster Test * Timing events during 1st Booster Mode Test (2021 12 1...
r37 - 22 Apr 2024 - 05:44 by DietrichBeck
TimingSystemDocumentsSaftlib
Simple API For Timing (SaftLib) Simple API For Timing (SAFT). The design and implementation of SaftLib is a major project. Introduction The key features SaftLib ...
r35 - 28 Aug 2023 - 13:32 by DietrichBeck
TimingSystemEtherbone
Etherbone Introduction The idea behind the EtherBone (EB) protocol is to extend the reach of the embedded Wishbone (WB) V4 System on a chip (SoC) bus system to r...
r4 - 08 Oct 2022 - 21:02 by DietrichBeck
TimingSystemEvent
Timing Messages Format of a Timing Message Timing messages is a term describing the input to a Timing Receiver (TR) that possibly leads to generation of a so cal...
r34 - 18 Aug 2020 - 15:47 by DietrichBeck
TimingSystemEventNumbers
Event Numbers Overview Event numbers serve as IDs for actions performed by the control system. Existing Facility Information about event numbers used by the ex...
r33 - 24 Jan 2024 - 11:05 by DietrichBeck
TimingSystemGmtUnipz
Data Master, UNILAC PZ and Various Gateways An Overview Introduction Today (December 2021) there exist two Machine Timing Systems at GSI. First, the General Ma...
r3 - 08 Dec 2021 - 15:03 by DietrichBeck
TimingSystemGroupsAndMachines
Groups and Machines Figure: Overview on GSI accelerators. Click here for a larger image. Overview Accelerator equipment relevant for the control system is organi...
r53 - 22 Aug 2023 - 12:55 by DietrichBeck
TimingSystemPolicies
Policies in the Timing Network * The timing network is managed by TOS and TOS defines the policies. * The timing network is a "field bus" synchronizing the...
r21 - 17 Nov 2019 - 12:48 by DietrichBeck
TimingSystemRelease
Releases and Snapshots of the Timing System Release A Timing Firmware Release packs together new features and requirements defined in our Development Road Map, ...
r26 - 30 Sep 2020 - 09:37 by DietrichBeck
TimingSystemWRSWitchNewHW
White Rabbit Switch Hardware 4.0 Overview This page summarizes the GSI requirements in context with the development of a new version of the White Rabbit Switch. ...
r3 - 06 Aug 2020 - 08:43 by DietrichBeck
TimingSystemWRUniPZ
White Rabbbit UNILAC PZ (wr unipz) Introduction UNIPZ Figure: Most simplified view on UNIPZ (upper part). It is a combination of a Super UNIPZ and seven UNI...
r29 - 17 Nov 2021 - 11:13 by DietrichBeck
Number of topics: 19
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