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You are here: Foswiki>Timing Web>TimingSystemDocumentation>TimingSystemDocuments>TimingSystemDocumentsPEXARIA5DB1 (05 May 2014, DietrichBeck)Edit Attach
PEXARIA5DB
The PEXIARA5DB is a mezzanine card for a PEXARIA5 carrier board. It exists in two variants.- PEXARIA5DB1, with IDC connector for LVDS signals: schematics
- PEXARIA5DB2, with MDHMR connector for LVDS signals: schematics
- modifikation.pdf: hardware patch for PEXARIA5DBX add-on boards
| I | Attachment | Action | Size | Date | Who | Comment |
|---|---|---|---|---|---|---|
 pdf |
modifikation.pdf | manage | 174 K | 08 Apr 2014 - 07:38 | DietrichBeck | hardware patch for <nop>PEXARIA5DBX add-on boards |
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Topic revision: r4 - 05 May 2014, DietrichBeck
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