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You are here: Foswiki>Timing Web>WebChanges (09 Jan 2009, ProjectContributor)Edit Attach
100 recent changes in Timing Web retrieved at 23:40 (GMT)
TimingSystemHowGenerateBursts
Main.EnkhboldOchirsuren 14 Aug 2019 How To: Burst generation this functionality is under development and not available in any release A simple solution for gener...
TimingSystemDocumentRep20190911
WR ZEN aka SSK Introduction The timing team (TOS) operates a couple of distinct White Rabbit networks. The most important one is a network called production, tha...
r8 - 20 Sep 2019 - 12:42 by DietrichBeck
TimingSystemNodesReleaseAsteriskExploder5aCommission
Exploder5a Commissioning Guide Note: This test is functional. It is not intended to cover verification validation tests of the design! Note: Software/Version ...
r25 - 06 Sep 2019 - 14:04 by EnkhboldOchirsuren
TimingSystemHowSnoopy
How To: snoopy spy Introduction This is a simple command line tool and provided by one of our colleagues from FEC and available on the ASL 7 cluster. Altho...
NEW - 06 Sep 2019 - 08:18 by DietrichBeck
TimingSystemCherryRelease
Cherry Release V4 (OUTDATED) The Cherry Release is partly compatible with the the Balloon release. * ECA et al should be compatible * But ... * there ...
r9 - 20 Aug 2019 - 07:28 by DietrichBeck
TimingSystemBallonRelease
Balloon Release (OUTDATED) The Balloon Release is NOT COMPATIBLE with the snapshot "January 2016" or previous releases or snapshots. If you want to test or integr...
r26 - 20 Aug 2019 - 07:27 by DietrichBeck
TimingSystemNodesReleaseAsterisk
Release Asterisk v2 (for miniCS) and updates compatible with SaftLib ( OUTDATED ) Asterisk is compatible to the control system releases R3, R4, R5 and R6 The rele...
r35 - 20 Aug 2019 - 07:27 by DietrichBeck
TimingSystemHowSoftCPUStackCheck
How To: LM32 Soft CPU Simple Stack Check Introduction This how to demonstrates how a simple check for possible stack violation has been implemented. Principle...
r4 - 04 Jul 2019 - 13:59 by DietrichBeck
QuartusInstallUbuntu1404
Installing Quartus under Ubuntu 14.04 (and possibly others) THIS HOWTO IS DEPRECATED Introduction This page contains a few notes on installing Altera's Quartu...
r3 - 19 Jun 2019 - 14:04 by DietrichBeck
TimingSystemHowConfigureEnvironment
Ohps! You are looking for an old wiki page that has been renamed. Try this wiki page Main.DietrichBeck 19 Jun 2019
NEW - 19 Jun 2019 - 13:58 by DietrichBeck
TimingSystemNodesSnapshotJan2016
Snapshot "January 2016" The intention of this snapshot is twofold. First, to make improvement of White Rabbit available at GSI. Second, to provide again a consist...
r19 - 19 Jun 2019 - 13:55 by DietrichBeck
TimingSystemHowEbFwload
How To: eb fwload Introduction This tool has been written to ease software development form lm32 Soft Cores. It allows to upload firmware to one or more Soft Cor...
r4 - 19 Jun 2019 - 13:55 by DietrichBeck
TimingSystemHowInstallFTRN
How To: Installation of a Timing Receiver THIS HOWTO IS DEPRECATED Introduction Installation of a timing receivers should be easy and straight forward. The phy...
r17 - 19 Jun 2019 - 13:55 by DietrichBeck
TimingSystemHowTriggerLM32FromEca
Timing Messages: How To test the ECA queue from LM32 Soft CPU and PC Introduction The specified ECA queue is used to storage timing events filtered by eventID. T...
r17 - 19 Jun 2019 - 13:55 by DietrichBeck
TimingSystemHowtoRTE
How to Build and Deploy the Timing Run Time Environment THIS HOWTO IS DEPRECATED The documentation here describes a version of the script that has never been pu...
r9 - 19 Jun 2019 - 13:55 by DietrichBeck
TimingSystemHowtoRTEManual
Building and Deployment for a Specific Kernel and Installation into a Staging Directory THIS HOWTO IS DEPRECATED Remark: This is really special. The information...
r2 - 19 Jun 2019 - 13:55 by DietrichBeck
TimingSystemSwitchHowToDIM
WR Switch: How To Cross Compile DIM THIS HOWTO IS DEPRECATED This describes the first try to cross compile DIM for a White Rabbit switch. DIM is a communication...
r7 - 19 Jun 2019 - 13:43 by DietrichBeck
TimingSystemSwitchRemoteMonitoring
WR Switch: Basic Remote Monitoring (Deprecated) THIS HOWTO IS DEPRECATED This describes how basic remote monitoring of White Rabbit switches can be done by usin...
r5 - 19 Jun 2019 - 13:42 by DietrichBeck
TimingSystemSwitchHowToHelloWorld
WR Switch: How To Cross Compile Hello World THIS HOWTO IS DEPRECATED This describes how I cross compiled hello world for switch Getting the Tools This assumes ...
r4 - 19 Jun 2019 - 13:42 by DietrichBeck
TimingSystemSwitchHowToUsing
WR Switch: How To Use a WR Switch THIS HOWTO IS DEPRECATED This is just a short list of things I found useful Login to a Switch * ssh via the management po...
r6 - 19 Jun 2019 - 13:41 by DietrichBeck
TimingSystemSwitchHowToFlash
WR Switch: How To Flash a WR Switch THIS HOWTO IS DEPRECATED Introduction Most importantly, you should the WRS manual. For version 4.2, see here. Basically, al...
r4 - 19 Jun 2019 - 13:41 by DietrichBeck
HdlmakeUbuntuInstall
hdlmake auf ein Ubuntu System installieren (Deprecated) THIS HOWTO IS DEPRECATED hdlmake ist ein Präprozessor um VHDL include files und VHDL source files in die...
r4 - 19 Jun 2019 - 13:41 by DietrichBeck
QuartusUbuntuInstallieren
Installieren Quartus II auf ein Ubuntu System: THIS HOWTO IS DEPRECATED * Download Quartus von https://www.altera.com/download/sw/dnl sw index.jsp * Quart...
r5 - 19 Jun 2019 - 13:38 by DietrichBeck
TimingSystemHowToMiniCS
Timing System within miniCS THIS HOWTO IS DEPRECATED After reflashing and upgrading the SCUs to 64bit, the timing system of release R1 is no longer operational!...
r14 - 19 Jun 2019 - 13:37 by DietrichBeck
TimingSystemHowToHelloWorldSoftCPU
Hello World on lm32 Soft CPU THIS HOWTO IS DEPRECATED A soft CPU based on the lm32 is embedded in the White Rabbit core. This how to describes a "Hello World" f...
r4 - 19 Jun 2019 - 13:37 by DietrichBeck
TimingSystemHowToInstallSoftCPUforPEXARIA2A
Installation of Tool Chain for the lm32 Soft CPU THIS HOWTO IS DEPRECATED A soft CPU based on the lm32 is embedded in the White Rabbit core. This how to describ...
r4 - 19 Jun 2019 - 13:36 by DietrichBeck
TimingSystemHowToInstallSoftCPUforSPECV2
Tool Chain for a SPEC Board. THIS HOWTO IS DEPRECATED A soft CPU based on the lm32 is embedded in the White Rabbit core. This how to describes the installation ...
r5 - 19 Jun 2019 - 13:35 by DietrichBeck
TimingSystemHowConfigureFTRNVME
FAIR Timing Receiver Node: How To Configure and Operate a VME Timing Receiver (outdated) THIS HOWTO IS DEPRECATED August 2013 Introduction The VETAR2 is the ne...
r7 - 19 Jun 2019 - 13:35 by DietrichBeck
ProgramPexaria5
Programmieren einer Pexaria 5 THIS HOWTO IS DEPRECATED Voraussetzungen : * USB Blaster * Promo 5 * 12 V Netzteil * Pexaria 5 * Quartus II Subscri...
r5 - 19 Jun 2019 - 13:35 by DietrichBeck
TimingSystemHowTRInstallation
How To: Installation of a Timing Receiver or SCU THIS HOWTO IS DEPRECATED This how to summarizes the steps required to install a timing receiver. Setup up a FE...
r2 - 19 Jun 2019 - 13:31 by DietrichBeck
Bel_Project_Building
BEL projects building HOW TO THIS HOWTO IS DEPRECATED Prerequistes The following packages are required to build BEL projects: $ sudo apt get install build esse...
r6 - 19 Jun 2019 - 13:30 by DietrichBeck
TimingSystemHowEbInfo
How To: eb info Introduction This tool has been written to get information on gateware and firmware actually employed. Usage Usage: eb info OPTION w ...
r2 - 19 Jun 2019 - 12:11 by DietrichBeck
TimingSystemHowSoftCPUHandleECAMSIs
How To: LM32 Soft CPU Handle the ECA message signaled interrupts (MSIs) Introduction The ECA unit is capable to send MSI on certain conditions, such as: * p...
r4 - 15 Apr 2019 - 13:31 by DietrichBeck
TimingSystemVetar2aDirectAccessMode
Main.MichaelReese 22 Aug 2017 Vetar2a: VME WB bridge direct access mode The normal mode of operation (after reset) of the Vetar2a card uses a VME wishbone bridge...
r7 - 11 Apr 2019 - 09:35 by MichaelReese
TimingSystemPMCTestingAndCommissioning
PMC Testing and Commissioning Guide Attention: This guide does not check the whole PCI/PMC standard! Attention: This is NOT for FAT Required comp...
r11 - 05 Mar 2019 - 13:11 by AlexanderHahn
TimingSystemDocumentRep20190221
Pseudo SRAM Access from lm32 Introduction The W968D6DA provides 256Mbit (32MByte) of Pseudo SRAM (datasheet). It provides 32 bit address width and 16 data lines....
r3 - 21 Feb 2019 - 10:46 by DietrichBeck
TimingSystemContext
The Timing System and its Context in the Accelerator Control System What is described here has been compiled from the Common Specifications for the Accelerator Co...
r16 - 28 Jan 2019 - 12:45 by DietrichBeck
TimingSystemDocumentRep20180131
Etherbone Performance Measurements Introduction Access to Wishbone (WB) slaves in the FPGA from the host system is a prominent use case for the accelerator contr...
r9 - 15 Jan 2019 - 12:46 by DietrichBeck
TimingSystemDeprecatedDocumentation
Deprecated Documents This is just a unrevised collection of outdated or deprecated documents. * Feature List for a Timing Receiver Node at GSI/FAIR (09/2014)...
NEW - 20 Nov 2018 - 07:27 by DietrichBeck
TimingSystemDocumentation
Documentation Some documentation is given here. This is not structured but just a collection of various things. * Documents * HOW TOs * Releases * Cur...
r5 - 18 Nov 2018 - 07:09 by DietrichBeck
TimingSystemGSEca
Timing Receiver: Event Condition Action Unit Figure: A Timing Receiver embedded in a Front End Computer. The core component is the Event Condition Action unit (...
r6 - 16 Nov 2018 - 11:01 by DietrichBeck
TimingSystemGettingStarted
Getting Started * Essentials * Timing Receiver: Event Condition Action Unit * Timing Receiver: Usage Main.DietrichBeck 16 Nov 2018
r5 - 16 Nov 2018 - 09:47 by DietrichBeck
TimingSystemGSOverview
Essentials Figure: Building blocks required for a single 'timing event' Bang!. Components of the General Machine Timing (GMT) are shown in blue. Components requ...
r4 - 13 Nov 2018 - 09:04 by DietrichBeck
TimingSystemOverview
Introduction to the General Machine Timing System The FAIR facility involves a long chain of accelerators which need to be tightly synchronized. An important cons...
r14 - 12 Nov 2018 - 10:37 by DietrichBeck
TimingSystemDocumentRep20180904
SCU Kernel Task Switching Latency Introduction The hardware group (thx to Stefan!) has investigated task switchting / preemption on the SCU kernel with RT patch ...
r6 - 27 Sep 2018 - 14:40 by DietrichBeck
TimingSystemFEC
How To: WB_FEC This wiki provides information about * WB FEC VHDL module and integration in Bel_Projects * Synthesis of Timing Receiver Gateware with the WB...
r14 - 05 Apr 2018 - 07:16 by DietrichBeck
TimingSystemHowConfigureDataMaster
Data Master: How To Configure and Operate There are different versions of the data master depending on the release of the control system. * Release R12 "Cherr...
r9 - 12 Mar 2018 - 09:57 by MathiasKreider
TimingSystemNextReleaseCandidate
"D?" Candidate Release Probably in March 2018. See here. Main.DietrichBeck 01 Mar 2018
r3 - 01 Mar 2018 - 11:15 by DietrichBeck
TimingSystemDocumentsRep201607222
Torture Report about GMT with Debian on PC and SL6/CentOS 7 on SCU3 Setup A schedule containing three messages is iterated by the Data Master. The messages are s...
r6 - 30 Jan 2018 - 09:55 by DietrichBeck
WRSimulation
WR Simulation How To This How To guide you in the simulation of the WR Core and WR Switch. Setup the Simulation environment You need a ModelSim runnig in your sy...
r5 - 24 Jan 2018 - 15:40 by cprados
TimingSystemHowOperateClockMaster
Clock Master: How To Operate Introduction This How To is intended for the members of the timing team. The clock master is the White Rabbit Grandmaster Clock of t...
r4 - 23 Dec 2017 - 09:27 by DietrichBeck
TimingSystemHowConfigureDataMasterR11
Data Master: How To Configure and Operate for Release R11 ("Cherry") Introduction This How To is intended for the members of the timing team. The data master is ...
r2 - 08 Dec 2017 - 08:15 by DietrichBeck
TimingSystemNodesReleaseAsteriskPexaria5Commission
Step by step guide to commissioning a new pexaria5: 1 Place powered off pexaria5 on ESD desk , ESD dischare! 1 Attach wrex2a addon board to baseboard WR1 (W...
r20 - 05 Dec 2017 - 10:33 by DietrichBeck
TimingSystemHowConfigureDataMasterR3
Data Master: How To Configure and Operate for Release R3 R9 ("Balloon") DEPRECATED Introduction This How To is intended for the members of the timing team. The d...
r14 - 04 Dec 2017 - 07:52 by DietrichBeck
TimingSystemHowConfigureDataMasterR10
Data Master: How To Configure and Operate for Release R10 ("Pre Cherry") DEPRECATED Introduction This How To is intended for the members of the timing team. The...
r3 - 04 Dec 2017 - 07:51 by DietrichBeck
SaftlibEtherboneLm32LatencyMeasurement
MSI/IRQ Latency Measurements with LM32, Etherbone and Saftlib In autumn 2017, the latency of Message Signalled Interrupts (MSI) has been measured involving differ...
r5 - 30 Nov 2017 - 14:24 by MichaelReese
Wrlldp
How To: WR LLDP This how to describes how to use LLDP in WR Devices. It is not meant to clarify what is LLDP. Info (November 2017): The development is already in...
r4 - 15 Nov 2017 - 09:38 by DietrichBeck
TimingSystemGPSDO
GPSDO The GPSDO serves as a primary reference time source for the timing system. Amongst the interfaces, there are three Gigabit Ethernet ports for NTP servers. ...
r9 - 13 Nov 2017 - 13:26 by DietrichBeck
TimingSystemDBusInfo
Main.MichaelReese 30 Sep 2016 Saftlib is constructed around the DBus IPC system. In order to maintain and develop the library, a fairly good understanding of the ...
r16 - 15 Sep 2017 - 09:10 by MichaelReese
TimingSystemNodesSnapshotApr2017
Snapshot April 2017 DON'T USE THIS SNAPSHOT!!! IT WAS DECIDED TO CANCEL THE ROLL OUT. This snapshot became necessary due to updates of the so called "function...
r5 - 05 May 2017 - 07:18 by DietrichBeck
TimingSystemHowSoftCPULM32Command
How To: LM32 Soft CPU Send a Command to a LM32 Soft CPU Introduction This how to demonstrates how to send a command to LM32 Soft CPU. This how to demonstrates ...
r2 - 28 Mar 2017 - 08:50 by DietrichBeck
TimingSystemHowSoftCPUUseDevicebus
How To: LM32 Soft CPU Using MIL Devicebus Introduction This how to demonstrates how to access a device on a MIL Devicebus connected to the SCU ("MIL piggy"). A...
r2 - 28 Mar 2017 - 08:49 by DietrichBeck
TimingSystemHowSoftCPUAccessLM32SharedMemWB
How To: LM32 Soft CPU Accessing a LM32 Soft CPU via shared memory and Wishbone Introduction This how to demonstrates how to access the LM32 Soft CPU via Shared...
r2 - 28 Mar 2017 - 08:48 by DietrichBeck
TimingSystemHowSoftCPUAccessOtherWB
How To: LM32 Soft CPU Accessing Another SoC Wishbone Device Introduction This how to demonstrates how to access another Wishbone device on the same SoC from th...
r2 - 28 Mar 2017 - 08:47 by DietrichBeck
TimingSystemAcronyms
Acronyms These acronyms are focused on the timing system, but may contain other acronyms of the accelerator complex as well. Unclear Acronyms acronyms to be clar...
r9 - 19 Sep 2016 - 15:45 by MichaelReese
EXPLODER5A
Figure 1: A complete exploder5a module (top view). Main.AlexanderHahn 15 Jul 2015
r2 - 23 Feb 2016 - 15:03 by DietrichBeck
TimingSystemNodesReleaseAsteriskVetar2aCommission
Vetar2a Commissioning Guide Note: This test is functional. It is not intended to cover verification validation tests of the design! Needed components for each...
r11 - 22 Oct 2015 - 14:44 by AlexanderHahn
FirmwareID
Main.MathiasKreider 07 May 2015 Getting Information about the Firmware on a device Firmware IDs The eb info tool was used to read out the build id ROM, providin...
r3 - 11 May 2015 - 09:06 by MathiasKreider
TimingSystemNodesReleaseR1VETAR2
VETAR2 (Release R1) The VETAR2 is a VME carrier board that can be White Rabbit enabled using the VETAR1DB2 add on board. I/Os are defined by a mezzanine board. H...
r22 - 06 Nov 2014 - 16:39 by DietrichBeck
TimingSystemLSAInterface
FESA Properties for DataMaster Class (current version running on vmla03) Global Interface (Device Name MCS_DM_GLOBAL) Setting Properties * Command * dataM...
r10 - 22 Oct 2014 - 09:37 by MathiasKreider
TimingSystemDataMasterXMLFormat
The XML Format Used by the Data Master The DM uses an XML format to describe a schedule. Presently (09/2014), this format depends on implementation details. A (no...
NEW - 29 Sep 2014 - 11:54 by DietrichBeck
TimingSystemDocumentsFTRNFeatures
Feature List for Timing Receivers at GSI and FAIR This page lists some hardware features for timing receivers at GSI and FAIR. Some recommended features will beco...
r13 - 25 Sep 2014 - 20:07 by DietrichBeck
TimingSystemNodesReleaseR1Exploder2C
EXPLODER2C (Release R1) The EXPLODER2C is a carrier board for a stand alone device based on an ArriaII FGPA. It can be White Rabbit enabled using the WREX1 add on...
r14 - 17 Jul 2014 - 08:24 by DietrichBeck
TimingSystemNodesReleaseR1
Nodes: Release R1 Overview rpd ...
NEW - 15 Jul 2014 - 15:04 by DietrichBeck
TimingSystemNodesReleaseR1SCU2
SCU2 (Release R1) The SCU (Scalable Control Unit) is the standard front end controller used by the CSCO group based on an ArriaII FPGA. It can be White Rabbit ena...
r3 - 15 Jul 2014 - 14:56 by DietrichBeck
TimingSystemNodesReleaseR1PEXARIA5
PEXARIA5 (Release R1) The PEXIARA5A is a PCIe carrier board based on an ArriaV FPGA. It can be White Rabbit enabled using a WREX1 add on board. I/O are implemente...
r16 - 15 Jul 2014 - 14:52 by DietrichBeck
TimingSystemDocumentsBlackCat1
Black_Cat1 Mezzanine Board The Black Cat mezzanine board extends the PEXARIA5 board with I/Os. However, the WR1 connector on Black Cat is no longer used, as the W...
r4 - 15 Jul 2014 - 14:50 by DietrichBeck
TimingSystemDocumentsSIXIO2
FMC Module SIXIO2 The FMC module SIXIO2 has been designed by Jan Hoffmann / EE. It's purpose is simple I/O. * Info by EE: Some figures and specs * Sixio2_SC...
r5 - 15 Jul 2014 - 12:57 by DietrichBeck
TimingSystemBuTiSReceiver
BuTiS Receiver Station The BuTiS receiver station are maintained by the RF group, contact persons are P. Moritz or B. Zipfel. Setup Figure 1: BuTiS receiver sta...
r9 - 15 Jul 2014 - 11:12 by DietrichBeck
TimingSystemManagementMaster
Management Master Configuration ... to be done... Main.DietrichBeck 03 Apr 2014
r2 - 15 Jul 2014 - 11:12 by DietrichBeck
TimingSystemHowConfigureDataMasterR1
Data Master: How To Configure and Operate for Release R1 This describes the temporary solution derived from miniCS (July 2013). This information is outdated, as...
r3 - 10 Jul 2014 - 08:42 by DietrichBeck
TimingSystemDocumentsPEXARIA5DB1
PEXARIA5DB The PEXIARA5DB is a mezzanine card for a PEXARIA5 carrier board. It exists in two variants. * PEXARIA5DB1, with IDC connector for LVDS signals: sche...
r4 - 05 May 2014 - 07:33 by DietrichBeck
TimingSystemDocumentsAddOnBoardFeatures
Feature List for Add On boards of Timing Receivers at GSI and FAIR This page lists some hardware features for add on boards. Such add on boards are mezzanine boar...
r11 - 01 Nov 2013 - 08:15 by DietrichBeck
WebPreferences
Timing Web Preferences Appearance * Set WEBBGCOLOR = #669966 * web specific background color, current color * Set SITEMAPLIST = on * set to...
GSITimingTeam
FAIR Timing/GSI Timing Team Core members of the GSI Timing Team are: T.Fleck C.Prados S.Rauch M.Kreider Further leading actors within the GSI controls group are U...
r3 - 05 Mar 2009 - 07:55 by TiborFleck
NetworkTopologyInterfaces
* chap2.pdf: Chapter2 Topology Main.CesarPrados 03 Mar 2009
r2 - 04 Mar 2009 - 13:52 by TiborFleck
WebAtom
Foswiki's Timing web
NEW - 09 Jan 2009 - 12:00 by ProjectContributor
WebRss
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NEW - 09 Jan 2009 - 12:00 by ProjectContributor
WebLeftBar
" warn="off"}% * ** * * * * * * * *
NEW - 09 May 2007 - 21:29 by ProjectContributor
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