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FirmwareID
Main.MathiasKreider 07 May 2015 Getting Information about the Firmware on a device Firmware IDs The eb info tool was used to read out the build id ROM, providin...
r3 - 11 May 2015 - 09:06 by MathiasKreider
GHDLVHPI
GHDL coupling to C via VHPI Motivation It is often useful to call into c libraries from within a VHDL simulation/testbench * because VHDL standard library is ...
r2 - 20 Oct 2022 - 09:04 by MichaelReese
MonitorLocalSystemTimeOfWRSviaSNMP
Monitor local system time of a WRS via SNMP 1. Introduction WRS synchronises its local time with an external NTP server, if one is specified in CONFIG_NTP_SERVER...
NEW - 24 Sep 2021 - 11:09 by EnkhboldOchirsuren
PortMirroringWRS
Use port mirroring on a WR switch (WRS) 1. Introduction Although port mirroring is supported by WRSs a corresponding command option is not documented in the user...
Quartus16InstallMint191
Installing Quartus 18.1 on Linux Mint 19.2 Introduction Below steps are described to solve some trouble during and after installation of Quartus Prime Standard ...
r6 - 01 Nov 2019 - 10:06 by MartinSkorsky
RunOrdinaryBoundaryClocksUsingLinuxptp
Run the ordinary and boundary clocks using linuxptp The linuxptp package is a PTPv2 implementation according to the IEEE 1588 standard for Linux. It includes the ...
Saftlib2MigrationGuide
Main.MichaelReese 07 Feb 2019 In response to user requests for lower latency communication and fewer library dependencies in saftlib, API breaking changes are int...
r30 - 12 Nov 2019 - 08:42 by MichaelReese
SynchronizeNonWrDevices
Synchronize the clock of non WR devices in the WR network 1. Introduction This document presents specific configurations of White Rabbit (WR) switches, which are...
NEW - 02 Jun 2022 - 13:22 by EnkhboldOchirsuren
TestIeee1588NetworkAdapters
Test the interoperability of the IEEE 1588 capable network adapters with the White Rabbit switches Introduction This report presents the interoperability between...
TimingSystemDeprecatedHowTo
Deprecated HOW TOs This is just a unrevised collection of outdated or deprecated HOW TOs. Timing Receivers * Building and Installation * HOW TO: Instal...
r6 - 14 Jan 2022 - 14:16 by DietrichBeck
TimingSystemDocumentation
Documentation Some documentation is given here. This is not structured but just a collection of various things. * Documents * HOW TOs * Releases * Cur...
r5 - 18 Nov 2018 - 07:09 by DietrichBeck
TimingSystemEBWireshark
How To: Etherbone with Wireshark Introduction Wireshark might be useful when you need to inspect Etherbone packages sent via Ethernet, see here. Here are a few h...
r3 - 11 Oct 2019 - 13:41 by DietrichBeck
TimingSystemFEC
How To: WB_FEC This wiki provides information about * WB FEC VHDL module and integration in Bel_Projects * Synthesis of Timing Receiver Gateware with the WB...
r14 - 05 Apr 2018 - 07:16 by DietrichBeck
TimingSystemFrontendAccess
How To: Accessing ACO Frontends Using ACO Tools Introduction This how to is just intended as a primer for non specialists. Disclaimer: There are many, many possi...
r5 - 23 Mar 2022 - 10:39 by DietrichBeck
TimingSystemHowBuildingDeployment
How To: Building and Deployment for Linux Boxes and SCU Most of the code has been developed in the context of the White Rabbit Project and is hosted by the Open H...
r77 - 11 May 2023 - 06:23 by DietrichBeck
TimingSystemHowConfigureDataMaster
Data Master: How To Configure and Operate There are different versions of the data master depending on the release of the control system. * Release R12 "Cherr...
r9 - 12 Mar 2018 - 09:57 by MathiasKreider
TimingSystemHowConfigureEnvironment
Ohps! You are looking for an old wiki page that has been renamed. Try this wiki page Main.DietrichBeck 19 Jun 2019
NEW - 19 Jun 2019 - 13:58 by DietrichBeck
TimingSystemHowConfigureFTRNCommandLine
How To: Command Line Tools for Timing Receiver (including SCU) Introduction A set of command line tools is deployed and available on Front End Computers (FECs). ...
r25 - 25 Feb 2022 - 11:45 by DietrichBeck
TimingSystemHowConfigureWRMILGW
WR MIL gateway Introduction WR MIL gateways are a replacement for the existing SIS and ESR Pulszentrale (PZ). They are implemented in software running on a LM32 s...
r27 - 08 Jun 2021 - 10:00 by MichaelReese
TimingSystemHowDMUniPZ
Gateway Data Master UNILAC Pulszentrale (DM UNIPZ) DM UNIPZ * Betrieb * Configuration and Rufbereitschaft * (for editing the basics, click) Further...
NEW - 18 Nov 2021 - 17:37 by DietrichBeck
TimingSystemHowDebugSaftlibWithGDB
Remote debugging of a running saft daemon with GDB It is possible to connect GDB to a running SCU, set breakpoints, step through the code, print variables, etc. T...
r2 - 13 Oct 2021 - 12:19 by MichaelReese
TimingSystemHowEventSnoopTool
Timing Messages: How To Snoop the Timing System News FEC for FESA class is now scuxl0143. Introduction This is a first simple solution to view what is going on ...
r10 - 22 Jan 2021 - 10:28 by AlexanderSchwinn
TimingSystemHowFECCheck
How To: Check a FEC Introduction This How To describes how to check a FEC works properly with respect to features provided by the GMT. Test Plan This is just a ...
r11 - 08 Nov 2023 - 13:43 by DietrichBeck
TimingSystemHowFlashFTRNUser
How To: Flash a Timing Receiver with a Gateware/Firmware Image TL;DR * disable all software on the host (FESA, saftd, ...) * SCU only: disable the watchdog...
r16 - 03 Nov 2021 - 07:50 by DietrichBeck
TimingSystemHowGenerateBursts
Main.EnkhboldOchirsuren 14 Aug 2019 How To: Burst generation this functionality is under development and not available in any release A simple solution for gener...
TimingSystemHowIPFTRNUser
How To: eb console Set a static IP Timing receivers not connected to a bootp server require a static IP for full operation. This is to be set via the eb console ...
r2 - 24 Mar 2022 - 15:47 by MathiasKreider
TimingSystemHowInstallEtherboneOnTSL101
Install etherbone library on tsl101 server * login on acc8 dev cluster (e.g. asl751) and clone repo and checkout correct branch git clone https://github.com/GS...
NEW - 07 Sep 2022 - 09:07 by MichaelReese
TimingSystemHowOperateClockMaster
Clock Master: How To Operate Introduction This How To is intended for the members of the timing team. The clock master is the White Rabbit Grandmaster Clock of t...
r4 - 23 Dec 2017 - 09:27 by DietrichBeck
TimingSystemHowPCSetup
How To: Setting Up a Linux Box Intended usage: E Release For older releases please check out the history of this Wiki page. Introduction This how to describes se...
r5 - 22 Dec 2020 - 09:00 by DietrichBeck
TimingSystemHowPhtif
How To: Poor Humans TIF An Ugly Temporary TIF Workaround for the 2021 Beam Time Introduction As there is currently no replacement for the MIL TIFs with the new...
NEW - 19 Apr 2021 - 15:22 by DietrichBeck
TimingSystemHowSaftUni
How To: saft uni Introduction This tool is intended to diagnose UNILAC operation. This tool is experimental! The standard tool saft ctl can of course be used. Ho...
r4 - 27 Oct 2023 - 08:21 by DietrichBeck
TimingSystemHowSnoopy
How To: snoopy spy Introduction This is a simple command line tool and provided by one of our colleagues from FEC and available on the ASL 7 cluster. Altho...
NEW - 06 Sep 2019 - 08:18 by DietrichBeck
TimingSystemHowSoftCPU
How To: LM32 Soft CPU Introduction Soft CPUs are a VDHL implementation of a CPU in a FPGA. With FAIR Timing Receivers, Soft CPUs are directly embedded in the Wis...
r13 - 23 Jan 2020 - 12:39 by MartinSkorsky
TimingSystemHowSoftCPUAccessLM32SharedMemWB
How To: LM32 Soft CPU Accessing a LM32 Soft CPU via shared memory and Wishbone Introduction This how to demonstrates how to access the LM32 Soft CPU via Shared...
r2 - 28 Mar 2017 - 08:48 by DietrichBeck
TimingSystemHowSoftCPUCompiler
How To: LM32 Soft CPU Compiler Introduction This how to describes the status and how to build the compiler for the lm32 soft cpu. Links * on github (for be...
r5 - 02 Sep 2020 - 09:46 by DietrichBeck
TimingSystemHowSoftCPUHandleECAMSIs
How To: LM32 Soft CPU Handle the ECA message signaled interrupts (MSIs) Introduction The ECA unit is capable to send MSI on certain conditions, such as: * p...
r4 - 15 Apr 2019 - 13:31 by DietrichBeck
TimingSystemHowSoftCPULM32Command
How To: LM32 Soft CPU Send a Command to a LM32 Soft CPU Introduction This how to demonstrates how to send a command to LM32 Soft CPU. This how to demonstrates ...
r2 - 28 Mar 2017 - 08:50 by DietrichBeck
TimingSystemHowSoftCPUStackCheck
How To: LM32 Soft CPU Simple Stack Check Introduction This how to demonstrates how a simple check for possible stack violation has been implemented. Principle...
r4 - 04 Jul 2019 - 13:59 by DietrichBeck
TimingSystemHowSoftCPUUseDevicebus
How To: LM32 Soft CPU Using MIL Devicebus Introduction This how to demonstrates how to access a device on a MIL Devicebus connected to the SCU ("MIL piggy"). A...
r2 - 28 Mar 2017 - 08:49 by DietrichBeck
TimingSystemHowTRRegistration
How To: Connecting a Timing Receiver to the White Rabbit Network A timing receiver MUST NOT be connected to a White Rabbit network without authorization. Authori...
r15 - 15 Sep 2020 - 15:15 by DietrichBeck
TimingSystemHowTriggerLM32FromEca
Timing Messages: How To test the ECA queue from LM32 Soft CPU and PC Introduction The specified ECA queue is used to storage timing events filtered by eventID. T...
r17 - 19 Jun 2019 - 13:55 by DietrichBeck
TimingSystemHowWRUniPZ
"wr unipz" is a component of the MIL based UNILAC 'Pulszentrale' (UNIPZ). As a field bus, it does not use the MIL 'Event' bus but a White Rabbit network. Logicall...
r9 - 15 Mar 2023 - 06:57 by DietrichBeck
TimingSystemHowWebMonitoring
How To: Monitoring via Web Pages Introduction This How To describes how to do monitoring via web pages. Access Some web pages are only accessible on the GSI cam...
r14 - 12 Jan 2024 - 08:54 by EnkhboldOchirsuren
TimingSystemMacAuthentication
White Rabbit Switch 802.1X MAC Authentication Introduction This is a standard feature of 'normal' network switches from Cisco, HP, ... and involves a remote Radi...
r24 - 16 Dec 2021 - 07:37 by DietrichBeck
TimingSystemNodesReleaseAsteriskExploder5aCommission
Exploder5a Commissioning Guide Note: This test is functional. It is not intended to cover verification validation tests of the design! Note: Software/Version ...
r25 - 06 Sep 2019 - 14:04 by EnkhboldOchirsuren
TimingSystemNodesReleaseAsteriskVetar2aCommission
Vetar2a Commissioning Guide Note: This test is functional. It is not intended to cover verification validation tests of the design! Needed components for each...
r11 - 22 Oct 2015 - 14:44 by AlexanderHahn
TimingSystemPCIeDirectAccessMode
Main.MichaelReese 15 Feb 2018 PCIe WB bridge direct access mode PCIe timing hardware where the PCIe bridge has been modified to support the "direct access mode" ...
r9 - 12 Jun 2023 - 07:28 by MichaelReese
TimingSystemPCIeSimpleDriver
Main.MichaelReese 14 Aug 2023 Device Driver Tutorial EB slave WB master over PCIe The goal is to write an Etherbone slave that controls a wishbone master on the ...
r2 - 14 Aug 2023 - 14:23 by MichaelReese
TimingSystemPEXPTestingAndCommissioning
PEXP Testing and Commissioning Guide Attention: This guide does not check the whole PCIe standard! Attention: This is NOT for FAT Required component...
r14 - 26 Mar 2021 - 09:40 by AlexanderHahn
TimingSystemPexaria5TestingAndCommissioning
Testing and Commissioning Guide for Pexaria5 Required components * Pexaria5 under test (named as P5UT in this guide) * PC with Intel Quartus (version 18...
NEW - 07 Oct 2020 - 09:56 by EnkhboldOchirsuren
TimingSystemTMIS
How To: TMIS Introduction TMIS (Timing Message Information Service) is a quick evaluation on distribution of timing messages via the ACC controls network. The ma...
r3 - 25 Jan 2021 - 19:27 by DietrichBeck
TimingSystemVetar2aDirectAccessMode
Main.MichaelReese 22 Aug 2017 Vetar2a: VME WB bridge direct access mode The normal mode of operation (after reset) of the Vetar2a card uses a VME wishbone bridge...
r7 - 11 Apr 2019 - 09:35 by MichaelReese
TimingSystemXdot
HOW TO: Use xdot to analyze schedules Based on Graphviz dot language there is the tool xdot. A GSI fork of xdot (one of 136 forks) enhances this to analyze schedu...
r7 - 22 Mar 2023 - 08:05 by MartinSkorsky
WRSimulation
WR Simulation How To This How To guide you in the simulation of the WR Core and WR Switch. Setup the Simulation environment You need a ModelSim runnig in your sy...
r5 - 24 Jan 2018 - 15:40 by cprados
WebHome
General Machine Timing System at GSI and FAIR The FAIR facility involves a long chain of accelerators which need to be tightly synchronized. This is achieved by t...
r456 - 26 Mar 2024 - 07:03 by DietrichBeck
Wrlldp
How To: WR LLDP This how to describes how to use LLDP in WR Devices. It is not meant to clarify what is LLDP. Info (November 2017): The development is already in...
r4 - 15 Nov 2017 - 09:38 by DietrichBeck
Number of topics: 56
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